This invention relates to a semiconductor memory such as a dynamic random access memory, more particularly to a semiconductor memory with an improved sense amplifier layout.
A semiconductor memory comprises an orthogonal matrix crossed by word lines and bit lines, with memory cells disposed at alternate intersections. The bit lines are connected pairwise to sense amplifiers.
A problem in the layout of such a memory is the large size of the sense amplifiers. The conventional solution is to dispose the sense amplifiers alternately on opposite sides of the memory cell matrix. Thus the first and second bit lines are coupled to a first sense amplifier on a first side of the matrix, the third and fourth bit lines are coupled to a second sense amplifier on the opposite side of the matrix, the fifth and sixth bit lines are coupled to a third sense amplifier disposed again on the first side of the matrix, and so on.
This arrangement provides additional room for the sense amplifiers, but it still has the problem tha the pair of bit lines to which a sense amplifier is coupled must be separated sufficiently that the sense amplifier can be disposed between them. Thus the first and second bit lines must be mutually separated by a certain large distance, as must the third and fourth bit lines, the fifth and sixth bit lines, and so on. The need for this spacing between adjacent bit lines is an obstacle to reduction of the size of the memory cell matrix.
Another problem with the conventional arrangement is that although the first and third sense amplifiers, for example, are somewhat separated, they are connected to the same pair of data bus lines. Long interconnecting lines between the sense amplifiers and data bus lines are therefore necessary, but this is also an obstacle to size reduction, and furthermore limits the operating speed of the memory.